Survey of Network Processors (NP)

Authors

  • K. Ettikan School of Computer Science, University Science Malaysia
  • Rosni Abdullah School of Computer Science, University Science Malaysia

Keywords:

Network Processor, Packet Processing, Parallel Processing, Address Lookup, Programming Element

Abstract

Network processing is becoming increasingly challenging to the network architects and engineers in terms of hardware design and application development due to an increase in packet processing complexity and constantly evolving protocol standards. New inventions in the transmission medium such as DWDM, SDH and GigaEthernet increase bandwidth capacity of the network. Meanwhile, more network-oriented applications are becoming popular. All these require faster and programmable packet processing capabilities in the inter-connecting network nodes. Packet processing technology of network equipment is seeing a migration from ASIC solutions to NP. In this paper, we review the latest technology of NP, which has been designed today for next generation networks. NP has to adapt to rapid protocol standards change and perform at wire speed like ASIC solutions, using considerably easier programmable NPs besides maintaining short time-to-market and time-in-market which is essential to meet tomorrow’s network demand. This paper discusses the trend in NP architecture, packet processing classification functions and the challenges ahead for the network processors architecture. The authors feel this is the first survey paper on NP.

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Published

2003-12-01

How to Cite

Ettikan, K., & Abdullah, R. (2003). Survey of Network Processors (NP). Malaysian Journal of Computer Science, 16(2), 21–37. Retrieved from https://ijps.um.edu.my/index.php/MJCS/article/view/6169